With ever increasing need for higher computational power, multiple central processing units (CPUs), also referred to as cores, are being integrated to form a single system on a chip (SoC). In such SoCs, each of the cores could be different (i.e. a heterogeneous system) and could host different operating systems but share the same memory and peripherals.
With sufficient processing power, multiple sources of video may be coupled to the SoC which may then receive multiple video streams that may be processed by the cores on the SoC, stored in memory coupled to the SoC, and displayed on a monitor coupled to the SoC. Alternatively, the SoC may be coupled to a network, either wired or wireless, and transmit the video streams to a remote location.
A video multiplexor may be used to connect to multiple sources of video, such as a set of cameras. For example, two TVP5158, Four-Channel NTSC/PAL Video Decoders, available from Texas Instruments, may be coupled to eight cameras and provide a multiplexed stream of eight video streams to the SoC. The TVP5158 chip converts the analog video signals to digital data and multiplexes the data on a line-by-line basis or pixel-by-pixel basis and sends the line-multiplexed or pixel-multiplexed data to a video port interface on the SoC. This video port is capable of de-multiplexing the multiplexed streams and storing the de-multiplexed data to individual channel frame buffers in external memory. Typical implementations of capturing this data involve getting an interrupt from the Video port when each frame for a each channel is received.
Other features of the present embodiments will be apparent from the accompanying drawings and from the detailed description that follows.